I'm in a learning curve process with the Phase-Shift Square-Waves CTC Mode-12 on 16-bit Nano, Uno and 2560 Timers. I'm finding the Phase-Shift Jitter-Free article is essentially correct.
Phase Step Size Can Sabotage Results
The real gotcha is the -size- of your Phase-Increment argument! If its too big, you stand a good chance of incurring a Phase-Flip error (180 degree invert of shifted channel). But if you make the change gradually, you avoid the problem and get away assigning most any angle using repeat assignments.
My projects were always assigning shift gradually. This is why I thought I was 100% right about the Phase-Flip issue (shifted output left HIGH when OCR change). Now I'm not so sure! More investigation required.
I await a logic analyzer to check what these Timers do when I change the OCR inside an Interrupt.
Just today, I've used the following Interrupts (on Uno) to change the OCR; COMPA, COMPB, ICAP and PCINT. The PCINT is the clear winner! I suspect its response delay is helping somehow. Hopefully the logic-analyses will reveal more information.
The good news is, using shift-increments below a certain value would let you realize specific angles without the dreaded Phase-Flip error.
I've received the Logic Analyzer. Its helping me a lot with Phase-Shifted PWM (got a 6-channel, 60 degree solution working!). The solution to glitch-free Square-Waves is my goal. I may miss the mark. Time will tell.
|Created: Sep 8, 2022 Updated: Sep 11, 2022|